The present invention is related to charge transfer circuits of the type comprising first and second charge storage locations and a charge transfer transistor for transferring a plurality of discrete packets of charge from the first to the second charge storage location. Charge transfer circuits of the foregoing type are particularly useful in monolithic analog to digital converters such as those described in U.S. Patent application Ser. No. 628,542, filed Nov. 3, 1975 now superseded by allowed continuation application Ser. No. 853,115, filed Nov. 21, 1977, and assigned to the assignee of the present application. Exemplary of several other applications of such circuits is U.S. Pat. No. 3,819,954 which discloses a charge transfer delay line circuit.
While the uses of charge transfer circuits are varied, a common requirement of charge transfer analog to digital converters is that an equal amount of charge be transferred to the second charge storage location during each charge transfer operation. This requirement is especially crucial when the analog to digital converter is required to provide absolute measurement.
In applications of this type, a signal proportional to the analog signal being converted is applied to the first charge storage location. During each of a plurality of charge transfer operations, a metered charge packet, proportional to the magnitude of the signal applied to the first charge storage location, is transferred to the second charge storage location. Since the magnitude of each metered charge packet is ideally constant and proportional to the signal applied to the first charge storage location, the number of metered charge packets required to charge the second charge storage location from a first to a second value is ideally proportional to the magnitude of the analog signal being converted.
The foregoing relationship is modified in actual application by thermally-induced and/or optically-induced leakage currents in the semi-conductor substrate in which the first and second charge storage locations and the charge transfer transistor are preferably formed. A quantity Q.sub.L of leakage current is then collected at the second charge storage location during each charge transfer interval. Since the magnitude of this thermal- or photon-induced leakage current varies with temperature or illumination, the number of charge packets required to change the charge stored at the second charge storage location from a first to a second value varies with varying substrate temperatures or illumination levels. Such variations result in inaccurate measurements. The present invention is designed to account for these changes so as to provide a temperature- or ambient- illumination-insensitive output.